1. Technical Field
The present disclosure relates to a semiconductor structure with alignment-control mask.
2. Description of the Related Art
As is known, the production of semiconductor devices involves processing of different layers of various materials. The layers are made in succession so as to form a stack on top of the substrate of a semiconductor wafer, and each undergoes a series of treatments before a subsequent layer is formed.
By processes for example of selective etching, photolithography, patterning, implantation, planarization, and so forth, structures or portions of structures are formed in each layer that must be aligned to corresponding elements in underlying layers with given levels of precision and within well-defined tolerances. For example, in a circuit the contact terminals of each device should be properly aligned to the respective connection lines used for communication with the rest of the circuit and are in general made in more superficial layers as compared to the devices.
In order to evaluate the precision of the alignment during and after manufacturing, areas of the wafer that are not to accommodate devices are used to create control grids. Typically, the control grids are formed in the scribe lines provided for dicing the wafer. The grids comprise sets of reference marks arranged on different layers in pre-determined relationships of position.
Examination of the control grids under the optical microscope enables verification of the alignment of structures formed in two or more layers. The grids can be used to evaluate the degree of a misalignment on the basis of the differences detected with respect to expected relative positions of the reference marks belonging to different layers.
A solution commonly adopted is represented by the so-called “Vernier grids or structures”, which comprise a plurality of rectilinear marks arranged in two layers in succession along an axis and perpendicular to the axis itself.
To ensure greater reliability, the sets of reference marks are in general redundant. Subsets of reference marks are repeated two or more times at a certain distance so as to have available a number of references. The repetition of the reference marks, among other things, enables a better appreciation of defects of alignment due to relative rotations between the structures of distinct layers. However, known control grids are organized in such a way that rather extensive regions are not usable for accommodating other structures.
Furthermore, it is frequently desired to evaluate simultaneously or in succession the alignment of different pairs of layers. Each pair of layers must hence have a respective set of reference marks, which must not be superimposed on the reference marks for other pairs of layers.
This leads to the area occupied by the control grids being as a whole rather extensive. In particular, conflicts may arise with the desire to maximize the number of devices that can be obtained from a semiconductor wafer.